A common goal in the fabrication of bipolar transistors, particularly in the fabrication of bipolar transistors in integrated circuits, is the fabrication of a transistor having a minimum capacitance between the base, emitter and collector. To this end, symmetrical transistors have been developed. A symmetrical transistor is one in which the interface area between the base and the emitter is approximately equal to the interface area between the base and collector. However, prior art techniques for fabricating a device of this type include complex alignment steps and/or difficult procedures such as the implantation of oxygen as disclosed in co-pending application Ser. No. 696,378, filed May 16, 1985, which is assigned to the assignee of this application.
Another problem in the fabrication of bipolar transistors is the problem of scalability. It is a desirable feature of a process for fabricating bipolar transistors that the process be capable of fabricating smaller and smaller transistors as lithography techniques for patterning these transistors on the surface of integrated circuits improves. However, using prior art techniques, a problem occurs providing ohmic contacts to the base of the transistors. For maximum performance of a bipolar transistor, the emitter must be heavily doped and the base lightly doped. In order to provide an ohmic contact to the base, a heavily doped region (extrinsic base) contiguous with the lightly doped (intrinsic base) region must be provided. This follows from the requirement that good ohmic contacts may only be made to heavily doped regions. However, after these heavily doped base contact regions are formed in the integrated circuit, subsequent processing steps involving heating will cause the extrinsic base to diffuse outward. This may cause the base region to be more heavily doped than desired or may partially counterdope the emitter of the transistor. This effect is negligible in larger transistors but creates large problems in one micron and submicron devices.